1. Field of the Invention
The present invention provides a method for avoiding deterioration of a dielectric characteristic of a dielectric layer having a low dielectric constant (low k), during a stripping process.
2. Description of the Prior Art
With the decreasing size of semiconductor devices and an increase in integrated circuits (IC) density, RC time delay, produced between the metal wires, seriously affects IC performance and reduces the IC working speed. RC time delay effects are more obvious especially when the line width is reduced to 0.25 xcexcm, even 0.13 xcexcm in a semiconductor process.
RC time delay produced between metal wires is the product of the electrical resistance (R) of the metal wires and the parasitic capacitance (C) of the dielectric layer between metal wires. However there are two approaches to reduce RC time delay: a) using conductive materials with a lower resistance as a metal wire or, b) reducing the parasitic capacitance of the dielectric layer between metal wires. In the approach of using a metal wire with a lower resistance, copper interconnection technology replaces the traditional Al:Cu(0.5%) alloy fabrication process and is a necessary tendency in multilevel metallization processes. Due to copper having a low resistance (1.67 xcexcxcexa9-cm) and higher current density load without electro-migration in the Al/Cu alloy, the parasitic capacitance between metal wires and connection levels of metal wires is reduced. However, reducing RC time delay produced between metal wires by only copper interconnection technology is not enough. Also, some fabrication problems of copper interconnection technology need to be solved. Therefore, it is more and more important to reduce RC time delay by the approach of reducing the parasitic capacitance of the dielectric layer between metal wires.
Additionally, the parasitic capacitance of a dielectric layer is related to the dielectric constant of the dielectric layer. If the dielectric constant of the dielectric layer is lower, the parasitic capacitance of the dielectric layer is lower. Traditionally silicon dioxide (dielectric constant is 3.9) cannot meet the present requirement of 0.13 xcexcm in semiconductor processes, so some new low k materials, such as polyimide (PI), FPI, FLARE(trademark), PAE-2, PAE-3 or LOSP are thereby consecutively proposed.
Unfortunately, these low k materials are composed of carbon, hydrogen and oxygen and have significantly different compositions to those of traditional silicon dioxide used in etching or adhering with other materials. Most of these low k materials have some disadvantages such as poor adhesion and poor thermal stability, so they cannot properly integrated into current IC fabrication processes.
Therefore, another kind of low k dielectric layer, such as HSQ (hydrogen silsesquioxane) (k=2.8), MSQ (methyl silsesquioxane)(k=2.7), HOSP (k=2.5), H-PSSQ (hydrio polysilsesquioxane), M-PSSQ (methyl polysilsesquioxane), P-PSSQ (phenyl polysilsesquioxane)and porous sol-gel(K less than 2), using the silicon dioxide as a base and adding some carbon and hydrogen elements inside is needed. These silicon based low k materials have potential in the future since properties of these materials closely resemble traditional silicon dioxide and can be easily integrated into current IC fabrication processes.
However, when patterning a dielectric layer composed of silicon dioxide based low k materials, the dielectric layer suffers some damage during etching or stripping process. Since the stripping process usually uses dry oxygen plasma ashing and wet stripper to remove a photoresist layer, the bonds in the surface of the dielectric layer are easily broken by oxygen plasma bombardment and react with oxygen ions and wet stripper to form moisture-absorbing Sixe2x80x94OH bonds. Since the dielectric constant of water is very high (k=78), the dielectric constant of the moisture-absorbing dielectric layer increases so resulting in a loss of the low dielectric constant characteristic. Moreover, the absorbed moisture in the low k dielectric layer also causes current leakage to increase so that the low k dielectric layer has a poor isolating characteristic, and even the phenomenon of poison via occurs, thereby seriously affecting the reliability of products.
It is therefore a primary objective of the present invention to provide a method for avoiding deterioration of a dielectric characteristic of a dielectric layer having a low dielectric constant, during a stripping process, to solve the above-mentioned problems.
In accordance with the claim invention, the method involves first forming a low k dielectric layer on a surface of a substrate of a semiconductor wafer. Then, a patterned photoresist layer is formed over the surface of the low k dielectric layer. The patterned photoresist layer is then used as a hard mask to perform an etching process on the low k dielectric layer. A stripping process is then performed to remove the patterned photoresist layer. Finally, hexamethyidisilazane (HMDS) is used to perform a surface treatment on the low k dielectric layer to remove Sixe2x80x94OH bonds in the low k dielectric layer.
The present invention uses HMDS to repair the surface of the low k dielectric layer that is damaged during the stripping process. Therefore, the damaged low k dielectric layer recovers to have its original dielectric characteristic so avoiding moisture absorption of the low k dielectric layer leading to deterioration of the dielectric characteristic.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment, which is illustrated in the various figures and drawings.